Intel is embracing chiplet design to uphold Moore’s Law, says VP of design engineering

According to Moore’s Law, named after Intel’s co-founder Gordon Moore, the number of transistors in an IC (integrated circuit) doubles almost every two years. This has been a trend in the microprocessors industry since 1970. With smaller transistors and advanced packaging solutions, Intel has been keeping Moore’s Law relevant for over five decades.

When compared to a chiplet, the transfer speed, latency, and everything is quicker on a monolithic die. However, as the SoC (System-on-Chip) became more complex, “monolithic dies became giant dice,” says Dass who is also the Vice-President, Design Engineering, at Intel Malaysia.

A chiplet will have several dies with an ideal die size. This will decrease the percentage of bad dies per wafer, resulting in a higher yield percentage.

With a single-die chip, there is a higher amount of defect density, especially with bigger dies. With IDM 2.0 (Integrated Device Manufacturing 2.0), Intel can mix and match, where a single system-on-chip can include a GPU based on a particular process technology, while the CPU could benefit from a more efficient manufacturing process. This will help Intel to design a processor that’s both efficient and cost-effective.

When asked about heating issues pertaining to 3D stacking, Dass said, “It’s a solvable one with a mixture of some innovative proprietary technology.”

It’s not just Intel; almost every major chip-design brand currently opts for chipset-based processors rather than a monolithic chip. This indicates that Intel will likely incorporate chiplet design in its future products and solutions.

Intel started to incorporate chiplet design almost a decade ago and the company’s Ponte Vecchio is currently the most complex chiplet. Similarly, contemporaries like AMD and Apple also make use of chiplet design to develop high-performance processors.